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Unique Technology - A New Genre
Analog Proficiency – FPGA Flexibility
Analog Proficiency
Low bias current, high efficiency
Analog switching speeds for high efficiency
Loss-less current sense for current mode, current share
Sophisticated Single/Multi-phase POLs
FPGA Flexibility
Select, Integrate dissimilar power components
Optimize, tune for application requirement
Telemetry-monitor/throttle to lower power
Adaptive high bandwidth compensators
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AmP POWER BLOCK
AmP SENSER BLOCK
ANALOG FABRIC
DIGITAL FABRIC
AmP Power Block
SIM Switcher
High-side or Low-side (Buck/Boost)
High side with external Diode (Buck)
Low side with external Diode (Boost)
Push-Pull Gate Driver for external MOSFET
Integrated Comparator (iThC)
MOSFET Current threshold comparator
Loss less current measurement
Over current protection
SIM Linear
Configurable LDO, Load Switch, Battery power path
LDO Source side regulation - CV or CC
LDO Drain side regulation for power path
LDO Push-pull operation for DDR
Slew rate control for inrush current
Soft Start/Stop programmable ramp rates
CS-DAC Comparator
Integrated current sense with comparator
Integrated DAC for current mode, share
Current telemetry
SIM: Scalable Integrated MOSFET
Switching or Linear operation
Integrated current sense: regulation, protection
Integrated DAC: current mode, current share
Multiple switching converter topologies
Multiphase topologies
Scalable: Combine adjacent for higher current
Segmentable: For lower gate capacitance
Package Configurations of Paired or Singles SIMs
Singles configuration for full flexibility
Paired configuration for small footprint
Scalable, Segmented, Integrated Current Sense, Linear or Switching Driver
AmP Senser Block
Adaptive Digitizer (ADi)
Error magnitude digitizer
Symmetric and differential
High bandwidth and precision
Pair for adjusting range and precision
Single for external sensors
Threshold Comparator (ThC)
Four per senser block
Protection, telemetry and hysteretic
Summation Amplifier (SuM)
Analog magnitude adder
Adjust gain and offset
Remote voltage sense
Soft start and stop
External current sense
Reference DAC (Nref)
Noise immune voltage references
Ten bit precision
Voltage-scaling, AVS, DVS
Protection and telemetry
Analog and Digital Fabric
Analog Fabric
Interconnects µAnalog elements and analog GPIOs
Analog Fabric with noise isolation
Shield wires across distribution
Switch nodes with T-switches
Internal references Nrefs from 10-bit DDS
Noise immune, referenced to local grounds
Curvature Compensated band-gap with e-fuse trim
Precision across voltage and temperature
Digital Fabric
Interconnects µAnalog elements, µLogic, CRAM
For control loop, monitoring, interface, telemetry
Core control path in µLogic
µLogic LUTs, Memory, and Arithmetic logic
Precision Modulation Timers
Timer array - 16 x four channels each
Eight Compensator RAMs (256 x 18)
Eight global CLKs, Two oscillators
Precision Modulation Timer
Four timers per block, 16 blocks
Nano, Micro, and Millisecond delays
Fixed, variable delays, stopwatch
Precision Dead time control for improved efficiency
Dynamic precision modulation timer
Precision regulation, >100x lower system clocks
CmpRAM: Compensator Block Ram
256 Words x 18 bits memory
Expandable to 512 Words x 18 bits
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