Senior Digital Design Systems Engineer

AnDAPT is revolutionizing the power management market with its disruptive Software Defined Power Solutions, offering customers unprecedented programmability to create and customize a Power Management IC (PMIC) within minutes. AnDAPT’s power solutions which combine an FPGA with power MOSFETs and analog circuit blocks, target markets where customers design PCBA’s with large numbers of power rails, to dramatically reduce development effort and time to market with AnDAPT products’ revolutionary flexibility, ease of use and instant changeability.


As Senior Digital Design Systems Engineer you will be the lead Digital Engineer working with our Systems and Design Team in San Jose and be responsible for the top-level Verilog architecture of new FPGA-based Software-Defined power converters after they have been defined. You will oversee the day-to-day Verilog development by the Power Engineers after you give them the top-level architecture. Your challenges include ensuring code reliability, and efficiency with respect to LUT usage.

You will also create and maintain Verilog design processes for the power engineers to follow.

We are currently in the process of defining and designing our second-generation platform which requires your input.

You are a great fit if you can quickly be coached on the basics of power supply operation and testing, are self-directed, can see the big picture and figure out priorities, work with minimal supervision, and are able to work with engineers with diverse expertise, experience, and backgrounds, in a fast-paced environment.



Top level architecture of Verilog Design of Power Converter controllers with reliability and LUT efficiency within the constraints of the FPGA fabric and analog circuit blocks

  • Oversee and review the day-to-day Verilog design work of the Power Engineers
  • Create Verilog design processes and checklists to streamline and speed the process, reduce bugs and errors, and promote maintainability of the code
  • Assist with troubleshooting bugs and find improvements in existing Verilog designs
  • Create documentation of the Power Converter Verilog designs, including creating block diagrams and writing descriptions
  • Work with the FPGA IC designers to improve the product definition of the next generation products
  • Work with and assist the Power Engineers in debugging issues
  • Work with the Software Team with troubleshooting and modifying the customer-facing front end design software, and back-end calculation engine
  • Work with and assist the Marketing Team with improving and correcting datasheet diagrams and text
  • Write Python scripts to automate testing of Verilog code
  • Run your own basic benchtop hardware power supply tests as part of testing your code



  • MSc in Electronic Engineering or equivalent work experience
  • Several years of Verilog coding experience of FPGA’s, with experience in working with and optimizing code of small FPGA systems
  • Basic understanding of power conversion topologies (e.g. buck, boost, buck-boost, LDO, Load-Switches etc) is a plus
  • Basic analog circuit knowledge (e.g. comparators, op-amp offset voltage, GPIO current capabilities, etc)
  • Excellent written and oral communications with experience in specification and definition creation, writing technical reports and test plans/instructions
  • Experience with the use of standard power supply laboratory test equipment (e.g. DMM, bench power supply, Oscilloscope, Current probes, etc.)


Email Resume to


San Jose, CA