Cost-Optimized
COST-OPTIMIZED
POWER TREE MAPPING – COST-OPTIMIZED
# | Rail | Seq | Power Component | Type | Upstream Rail | Vinput (V) | Vout (V) | Iout (A) | AnDAPT PMIC |
1 | VCCINT, VCCBRM, VCCPINT | 1 | C220 | Sync Buck HC | VIN | 12 | 1 | 7 | ARD_X_Z70_A1_IC1 |
2 | MGTAVCC | 1 | C200 | Sync Buck | VIN | 12 | 1 | 5 | ARD_X_Z70_A1_IC1 |
3 | VCCAUX, VCCPAUX, VCCPLL | 2 | C200 | Sync Buck | VIN | 12 | 1.8 | 2 + 0.5 + 0.12 | ARD_X_Z70_A1_IC1 |
4 | MGTAVTT | 2 | C200 | Sync Buck | VIN | 12 | 1.2 | 2 | ARD_X_Z70_A1_IC1 |
5 | VCCO_DDR | 3 | C710 | SIM LDO | VCCAUX | 1.8 | 1.5 | 0.5 | ARD_X_Z70_A1_IC2 |
6 | VCCO_PL | 3 | C150 | Async Buck | VIN | 12 | 3.3 | 3 | ARD_X_Z70_A1_IC2 |
7 | VCCO_PS | 3 | C150 | Async Buck | VIN | 12 | 3.3 | 2 | ARD_X_Z70_A1_IC2 |
8 | VTTDDR | 4 | C200 | Sync Buck | VIN | 12 | 0.75 | 3 | ARD_X_Z70_A1_IC2 |
9 | MGTAVCCAUX, VCCADC | 4 | C750 | Load Switch | VCCAUX | 1.8 | 1.8 | 0.12 | ARD_X_Z70_A1_IC2 |