Stratix V

ARD_A_STRV

Stratix V

The ARD_A_STRV is a scalable power supply designed to provide power to Altera Stratix V devices. The design is scalable and flexible to support the FPGA family SKUs from the most basic 5SEB9 to the most feature-rich and power hungry 5SGSD6. The programmable system integration, upward scalability, high performance/watt numbers and reduced time-to-market features of the AnDAPT’s AmP PMIC makes it an ideal match for handling power management responsibilities of Stratix V FPGA solutions.


电源树映射 – STRATIX V

#顺序电源组件类型上游铁路输入电压(V)输出电压 (V)电流输出 (A)AnDAPT PMIC
1VCC
(VCC, VCCHIP, VCCHSSI)
1C8601-Ph DrMOS CtrlPVIN120.8520ARD_A_STRV
2VCCPD
(VCCPD, VCCPGM, VCCA_FPLL,
VCC_AUX, VCCA_GXB)
2C200同步降压PVIN121.52ARD_A_STRV
3VCCIO3C220同步降压PVIN121.83ARD_A_STRV
4VCCPT
(VCCPT, VCCH_GXB, VCCD_FPLL,
VCCT_GXB, VCCR_GXB)
4C200同步降压PVIN121.52ARD_A_STRV

ANDAPT解决方案

ARD_I_STRV AnDAPT Solution

热视图 IC1

ARD_I_STRV Thermal View IC1

设计视图 IC1

ARD_I_STRV Design View IC1
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