Stratix V
POWER TREE MAPPING – STRATIX V
| # | Rail | Seq | Power Component | Type | Upstream Rail | Vinput (V) | Vout (V) | Iout (A) | AnDAPT PMIC |
| 1 | VCC (VCC, VCCHIP, VCCHSSI) | 1 | C860 | 1-Ph DrMOS Ctrl | PVIN | 12 | 0.85 | 20 | ARD_A_STRV |
| 2 | VCCPD (VCCPD, VCCPGM, VCCA_FPLL, VCC_AUX, VCCA_GXB) | 2 | C200 | Sync Buck | PVIN | 12 | 1.5 | 2 | ARD_A_STRV |
| 3 | VCCIO | 3 | C220 | Sync Buck | PVIN | 12 | 1.8 | 3 | ARD_A_STRV |
| 4 | VCCPT (VCCPT, VCCH_GXB, VCCD_FPLL, VCCT_GXB, VCCR_GXB) | 4 | C200 | Sync Buck | PVIN | 12 | 1.5 | 2 | ARD_A_STRV |
ANDAPT SOLUTION

THERMAL VIEW IC1

DESIGN VIEW IC1

